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4.2 Systems Instructions

Systems instructions deal with such functions as:

  1.  Verification of pointer parameters (refer to Chapter 6):

    ARPL             -- Adjust RPL
    LAR              -- Load Access Rights
    LSL              -- Load Segment Limit
    VERR             -- Verify for Reading
    VERW             -- Verify for Writing

  2.  Addressing descriptor tables (refer to Chaper 5):

    LLDT             -- Load LDT Register
    SLDT             -- Store LDT Register
    LGDT             -- Load GDT Register
    SGDT             -- Store GDT Register

  3.  Multitasking (refer to Chapter 7):

    LTR              -- Load Task Register
    STR              -- Store Task Register

  4. Coprocessing and Multiprocessing (refer to Chapter 11):

    CLTS             -- Clear Task-Switched Flag
    ESC              -- Escape instructions
    WAIT             -- Wait until Coprocessor not Busy
    LOCK             -- Assert Bus-Lock Signal

  5.  Input and Output (refer to Chapter 8):

    IN               -- Input
    OUT              -- Output
    INS              -- Input String
    OUTS             -- Output String

  6.  Interrupt control (refer to Chapter 9):

    CLI              -- Clear Interrupt-Enable Flag
    STI              -- Set Interrupt-Enable Flag
    LIDT             -- Load IDT Register
    SIDT             -- Store IDT Register

  7.  Debugging (refer to Chapter 12):

    MOV              -- Move to and from debug registers

  8.  TLB testing (refer to Chapter 10):

    MOV              -- Move to and from test registers

  9.  System Control:

    SMSW             -- Set MSW
    LMSW             -- Load MSW
    HLT              -- Halt Processor
    MOV              -- Move to and from control registers
The instructions SMSW and LMSW are provided for compatibility with the 80286 processor. 80386 programs access the MSW in CR0 via variants of the MOV instruction. HLT stops the processor until receipt of an INTR or RESET signal.

In addition to the chapters cited above, detailed information about each of these instructions can be found in the instruction reference chapter, Chapter 17.

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Next: Chapter 5 Memory Management